IEEE Cluster 2024

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IEEE Cluster 2024

Tutorials Cluster 2024

Full Day

  • Best Practices for HPC in the Cloud with AWS and Graviton (Arm) instances
    Abstract (click to expand):

    High Performance Computing in the cloud has grown significantly over the last five years. It is expected to grow at a pace more than twice that of the on-premises server market in the next five years (according to Hyperion Research). Weather, computational fluid dynamics (CFD), genomic analysis, AI/ML and more are workloads that leverage the elasticity and the broad compute choices of the cloud to innovate faster and deliver faster results. The large choice of compute, storage and network options and the dynamic nature of cloud can make the first experience a daunting proposition. Cloud technologies provide new capabilities to scientists, engineers and HPC specialists, however, how to use them may not be immediately clear.

    This tutorial provides an intermediate and advanced content to run and manage HPC in the cloud. It is organized in a series of progressive lectures and labs that provides a hands-on learning experience. It starts with a primer on cloud foundations and how they map to common HPC concepts, dives deeper into cloud core components and presents the best practices to run HPC in the cloud.

    This tutorial uses a combination of lectures and hands-on labs on provided temporary Amazon Web Services (AWS) accounts to deliver both conceptual and hands-on learning. We will provide access to Arm / Graviton processors to run real-life scientific applications during the workshop and after (up to 72 hours).

    Prerequisites:

    • Laptop with a modern web browser
    • Basic understanding of HPC concepts and architectures
    • Basic proficiency with the Linux command line


  • Embrace Arm and GPU in the datacenter using the NVIDIA Grace Hopper Superchip
    Abstract (click to expand):

    Arm technology has become a compelling choice for HPC due to its promise of efficiency, density, scalability, and broad software ecosystem support. To further advance datacenter and accelerated computing solutions, NVIDIA has built the Grace Hopper GH200 Superchip which brings together the groundbreaking performance of the NVIDIA Hopper GPU with the versatility of the NVIDIA Grace CPU, tightly connected with a high bandwidth and memory coherent chip-2-chip (C2C) interconnect.

    In this tutorial participants will learn about the design principles and the architecture choices that make NVIDIA Grace Hopper GH200 Superchip a unique platform for accelerated computing and AI and the convergence of the two. To achieve that, the tutorial first introduces how to compile, execute, profile and optimize code for NVIDIA Grace CPU, then the presenters will cover various materials aiming to demonstrate how to leverage NVIDIA Hopper and the NVIDIA GH200 architecture via explanation of available programming models, toy examples and demonstration using real applications. Advanced users will be allowed to bring their own code and test live with the supervision of NVIDIA experts. Hands-on exercises are designed to teach and provide practical hands-on feedback of key techniques and best practices that can be applied to more complex codes.

    Prerequisites:

    • Laptop with a SSH terminal
    • Basic understanding of HPC concepts and architectures
    • Basic proficiency with the Linux command line


Half Day

  • GPU accelerated applications with CUDA-Q: An integrated framework for hybrid classical-quantum computing workloads
    Abstract (click to expand):

    A quantum computer utilizes the laws of quantum mechanics and phenomena such as superposition, entanglement, and interference to encode and process information. This new paradigm of computation is expected to have wide-ranging applications in materials simulation, high energy physics, optimization, finance, and machine learning. As quantum hardware matures, algorithms that combine quantum and High-Performance Computing (HPC) are increasingly being investigated by the research community. Broadly, these fall under the category of variational quantum algorithms, hybrid quantum-classical models or using classical machine learning approaches to enhance quantum computations. Providing researchers with the tool and the ability to enhance this workflow is the goal of CUDA-Q.

    CUDA-Q is a hybrid programming framework enabling researchers to program workflows for disparate architectures. It enables integrations of QPUs (quantum processing units), CPUs and GPUs (graphical processing units) in one system and enables built in parallelization with the ability to go from a single CPU to 1000s of GPUs with minimal changes enabling quantum research at scale and performance.

    This tutorial will introduce quantum computing with basic introductory examples that will highlight key features required in a hybrid programming framework. We then build upon this by introducing variational quantum algorithms for finding eigenvalues of a matrix. We discuss how this can be scaled using techniques built into CUDA-Q enabling parallelization at scale.

    Only knowledge of simple linear algebra (e.g. unitary matrices) is assumed in this tutorial. Knowledge of quantum computation is not required. So please feel free to participate.

    Prerequisites:

    • Device and account to access Google Colab


  • Identifying Software Inefficiency with Fine-grained Value Profilers

Conference registration includes workshops and tutorials (with no additional fee). Tutorial-only registration is NOT available.